The MOS 6567/6569 video controller (VIC-II) and its application in the Commodore 64
Contents 3. Description of the VIC 3.6. Memory access/Timing of a raster line
3.6.3. Timing of a raster line |
The sequence of VIC memory accesses within a raster line is hard-wired, independent of the graphics mode and the same for every raster line. The negative edge of IRQ on a raster interrupt has been used to define the beginning of a line (this is also the moment in which the RASTER register is incremented). Raster line 0 is, however, an exception: In this line, IRQ and incrementing (resp. resetting) of RASTER are performed one cycle later than in the other lines. But for simplicity we assume equal line lengths and define the beginning of raster line 0 to be one cycle before the occurrence of the IRQ. First the timing diagrams, the explanation follows: 6569, Bad Line, no sprites: 6569, no Bad Line, no sprites (abbreviated): 6567R56A, Bad Line, sprites 5-7 active in this line, sprite 0 in the next line (abbreviated): 6567R8, no Bad Line, sprites 2-7 active in this line, sprites 0-4 in the next line (abbreviated): The line "Cycl-#" show the number of the clock cycle within the raster line. The line starts with cycle 1 and consists of 63 cycles on the 6569, of 64 cycles on the 6567R56A and of 65 cycles on the 6567R8. The last cycle of the previous line and the first cycle of the next line have also been included in the diagrams to make things clearer. The lines "ø0", "IRQ", "BA" and "AEC" reflect the state of the bus signals with the same names. ø0 is low in the first phase and high in the second phase. The symbols in the lines "VIC" and "6510" show what kind of access VIC and 6510 do in the corresponding clock phase (for an explanation of the different access types of the VIC see section 3.6.2.):
c | Access to video matrix and Color RAM (c-access)
g | Access to character generator or bitmap (g-access)
0-7 | Reading the sprite data pointer for sprite 0-7 (p-access)
s | Reading the sprite data (s-access)
r | DRAM refresh
i | Idle access
x | Read or write access of the processor
X | Processor may do write accesses, stops on first read (BA is low and so is RDY)
The line "X coo." contains the X coordinates of the beginning of each clock phase (thus the "\\\" as a reminder) and the line "Graph." is a projection of the 40 column display window and the border to these coordinates, for positioning sprites. However, this doesn't correspond to the signal on the VIC video output. Also you cannot see from the "Graph." line when the border unit generates the border. This happens approx. 8 pixels later than shown in the "Graph." line. To time the accesses of the processor within a raster line when programming, it's best to use the VIC g-accesses for orientation by changing a byte in graphics memory with the 6510 and watching on the screen on which character the change is first visible. The write access of the processor must then have occurred in the clock phase immediately before. Then you can use the diagrams to determine the clock cycle in which the access took place and count the other accesses relative to it.